How Apple Monster Chip Moore Law?
- Marvin Harvey
How Apple’s Monster M1 Ultra Chip Keeps Moore’s Law Alive By combining two processors into one, the company has, From a report: “UltraFusion gave us the tools we needed to be able to fill up that box with as much compute as we could,” Tim Millet, vice president of hardware technologies at Apple, says of the Mac Studio.
has shown it to be competitive with the fastest high-end computer chips and graphics processor on the market. Millet says some of the chip’s capabilities, such as its potential for running AI applications, will become apparent over time, as developers port over the necessary software libraries. The M1 Ultra is part of a broader industry shift toward more modular chips.
Intel is developing a technology that allows different pieces of silicon, dubbed “chiplets,” to be stacked on top of one another to create custom designs that do not need to be redesigned from scratch. The company’s CEO, Pat Gelsinger, has identified this “advanced packaging” as one pillar of a grand turnaround plan.
Intel’s competitor AMD is already using a 3D stacking technology from TSMC to build some server and high-end PC chips. This month, Intel, AMD, Samsung, TSMC, and ARM announced a consortium to work on a new standard for chiplet designs. In a more radical approach, the M1 Ultra uses the chiplet concept to connect entire chips together.
Apple’s new chip is all about increasing overall processing power. “Depending on how you define Moore’s law, this approach allows you to create systems that engage many more transistors than what fits on one chip,” says Jesus del Alamo, a professor at MIT who researches new chip components.
- He adds that it is significant that TSMC, at the cutting edge of chipmaking, is looking for new ways to keep performance rising.
- Clearly, the chip industry sees that progress in the future is going to come not only from Moore’s law but also from creating systems that could be fabricated by different technologies yet to be brought together,” he says.
“Others are doing similar things, and we certainly see a trend towards more of these chiplet designs,” adds Linley Gwennap, author of the Microprocessor Report, an industry newsletter. The rise of modular chipmaking might help boost the performance of future devices, but it could also change the economics of chipmaking.
What is Moore’s Law and is it still relevant today?
Key Takeaways –
Moore’s Law states that the number of transistors on a microchip doubles about every two years, though the cost of computers is halved.In 1965, Gordon E. Moore, the co-founder of Intel, made this observation that became known as Moore’s Law. Another tenet of Moore’s Law says that the growth of microprocessors is exponential.
Is Moore’s Law coming to an end?
Forecasts and roadmaps – In April 2005, stated in an interview that the projection cannot be sustained indefinitely: “It can’t continue forever. The nature of exponentials is that you push them out and eventually disaster happens.” He also noted that transistors eventually would reach the limits of miniaturization at levels: In terms of size you can see that we’re approaching the size of atoms which is a fundamental barrier, but it’ll be two or three generations before we get that far—but that’s as far out as we’ve ever been able to see.
- We have another 10 to 20 years before we reach a fundamental limit.
- By then they’ll be able to make bigger chips and have transistor budgets in the billions.
- In 2016 the, after using Moore’s Law to drive the industry since 1998, produced its final roadmap.
- It no longer centered its research and development plan on Moore’s law.
Instead, it outlined what might be called the More than Moore strategy in which the needs of applications drive chip development, rather than a focus on semiconductor scaling. Application drivers range from smartphones to AI to data centers. IEEE began a road-mapping initiative in 2016, “Rebooting Computing”, named the (IRDS).
Most forecasters, including Gordon Moore, expect Moore’s law will end by around 2025. Although Moore’s Law will reach a physical limitation, some forecasters are optimistic about the continuation of technological progress in a variety of other areas, including new chip architectures, quantum computing, and AI and machine learning.
CEO Jensen Huang declared Moore’s law dead in 2022; several days later CEO Pat Gelsinger declared that Moore’s law is not dead.
How has Moore’s law impacted the technology?
October 18, 2022 Although economists and technologists frequently cite Moore’s Law in their analyses of the semiconductor industry, the drivers and consequences of this phenomenon for public policy are less widely understood. Understanding the practical implications of Moore’s Law is critical to support policies that advance the nation’s international competitiveness and national security.
Q1: What is Moore’s Law? A1 : While popularly referred to as a “law,” Moore’s Law is better understood as an empirical observation regarding advancements in computing. In a 1965 Electronics Magazin e article, the cofounder of Fairchild Semiconductor International, Inc. and Intel, Gordon Moore, projected that the ideal number of transistors per square inch on a microchip would double each year while the manufacturing cost per component would halve.
Ten years later, Moore revised his original projection and said chip density would, instead, double every two years for at least the next decade. More transistors and components, in layman’s terms, means more computing power, higher efficiency, and more complex functions.
A corollary of Moore’s Law is that the cost of computing has fallen dramatically, enabling adoption of semiconductors across a wide span of technologies. Today, semiconductors are the technology platform underpinning how the world works, communicates, and consumes. Q2: Is Moore’s Law still viable? A2 : Moore’s Law has largely held true into the twenty-first century, though it has begun to slow down as engineers reach the limits of shrinking circuits within the laws of physics.
Even so, the computing power of a single integrated circuit today is roughly 2 billion times what it was in 1960. As the exponential increase in the density of transistors per square inch on a chip decelerates, some observers have proclaim ed Moore’s Law demise.
However, advances in chip packaging and design may allow a form of Moore’s Law to “survive” into the 2020s. In 1995, Moore himself admitted that “the definition of ‘Moore’s Law’ has broadened to refer to anything related to the semiconductor industry that, when plotted on semi-log paper, approximates a straight line.” A reconceptualization of Moore’s Law—sometimes dubbed “more than Moore” or MtM— prioritizes system complexity over chip density as a more accurate path for progress in computing technology and has extended the continued viability of Moore’s Law.
As of 2022, advancements along the lines of MtM, including the advent of the so-called three-dimensional integrated circuit (3DIC), heterogenous integration, and “chip stacking,” as well as the potential for quantum-enabled semiconductors, may hold the key to the persistence or even acceleration of Moore’s Law—albeit in different form—well into the twenty-first century.
Q3: What are the practical implications of Moore’s Law for the U.S. economy and for U.S. policymakers? A3 : Moore’s Law drives innovation-based competition within the semiconductor industry. With Moore’s Law setting the pace, semiconductor firms understand that they have a predictable timetable—roughly two years—for when they must conceive the next generation in functionality before their competitors almost inevitably will; they must either keep up or lose out.
Annual roadmaps — set by the industry itself—enable firms to meet this pace of innovation. This pace of innovation in the semiconductor industry also drives innovation in industries powered by semiconductor chips. This includes the consumer electronics sector that produces the latest smartphones and laptops, and emerging technologies such as artificial intelligence (AI) and machine learning, cloud computing, internet of things (IoT) infrastructure, and next-generation telecommunications.
- Advances in chips also facilitate breakthroughs in emerging and precommercial industries like quantum information science and quantum computing—which will, in turn, enable more advanced chips.
- However, like all commercial and scientific endeavors, adherence to Moore’s Law in the semiconductor industry relies on significant investment.
In fact, each doubling of chip computing power requires a parallel doubling in capital investment. While annual increases in research and development (R&D) expenditure within the semiconductor industry since 2000 have been relatively modest, the struggle to maintain production in an increasing number of legacy or trailing-edge nodes (older chips) while continuing to compete and manufacture at the leading-edge at-scale carries significant costs,
- In 2021, the semiconductor industry collectively spent $146 billion in capital expenditure, 60 percent of which came from the world’s three biggest chipmakers: Intel, Samsung, and TSMC.
- While the astonishing growth of the semiconductor market—especially since 2020—has recovered these expenses, each semiconductor firm must participate in, and benefit from that growth for the investments to remain economically viable.
According to the Advanced Electronics Practice at McKinsey & Co., the semiconductor market follows a winner-takes-all model: “If a company’s product or service is even slightly better than a competitor’s, it typically captures an outsize portion—or even the vast majority—of industry revenue.” This means that a country whose semiconductor industry falls behind in both the investment and technological leadership needed to keep up with Moore’s Law can cede the related downstream economic benefits and the national security advantages that come from that industrial leadership.
“Catching up” after falling behind, therefore, becomes an impossible proposition, as the required iterative investment must be made after forfeiting the previous generation’s profits to a competitor. With each missed opportunity, the price tag for regaining leadership grows exponentially higher. Q4: Where does the United States stand and what is the path forward? A4 : The United States has historically been an active participant in Moore’s Law advancements.
Silicon Valley was the birthplace of the first transistor; many of the semiconductor industry’s pioneering firms such as Intel, Texas Instruments, IBM, and others were U.S.-based and, even until 1990, the United States alone was home to 40 percent of the world’s semiconductor manufacturing capacity.
Today, the United States is still a major player in the semiconductor industry, with 7 of the top 10 chip design firms by annual revenue headquartered in the United States. This leadership is a critical national asset, with chip design constituting the highest return-on-investment niche within the industry.
However, as in other industry sectors, U.S. leadership in semiconductor manufacturing has atrophied over the past three decades. Global market trends began to favor specialization and the outsourcing of certain processes overseas, particularly chip fabrication.
- East Asian firms in Taiwan, South Korea, and China were the major beneficiaries, with that region now accounting for nearly 80 percent of global chip fabrication capacity.
- According to industry veteran Richard Elkus, Jr., by relinquishing leadership in chip manufacturing, the United States has ceded revenue critical to financing continued investment in Moore’s Law advancements.
This realization comes amid growing concerns about the stagnation of the U.S. innovation system. Research conducted by experts at Duke University found that total factor productivity growth in the United States—a metric driven largely by innovation— has decelerated over the years despite steady annual increases in basic science R&D spending and the number of science and engineering PhD graduates.
While the factors behind this trend are manifold, its consequences point to a vulnerability: if the U.S. innovation economy is not as dynamic or competitive as it once was, its ability to translate increased investment into technological progress and—by extension—its ability to secure U.S. participation in Moore’s Law is attenuated.
Q5: What are the consequences of the CHIPS and Science Act? A5 : With the passing of the CHIPS and Science Act (also known as CHIPS+), policymakers have taken the first critical step in addressing the nation’s ability to maintain Moore’s Law leadership.
Incentives for constructing semiconductor fabs on U.S. soil are already enticing major chip companies to make substantial investments in facilities across the United States, including Intel in Ohio, TSMC in Arizona, and Samsung in Texas, These investments, in addition to creating thousands of high-skilled, well-paying jobs, build local manufacturing capacity and renew the nation’s semiconductor innovation ecosystem.
Likewise, the significant R&D initiatives authorized in Division B of CHIPS+–which would add up to around $200 billion if fully funded—constitute a major federal commitment to revitalizing U.S. science and innovation infrastructure. Even so, other nations are forging ahead with their investments.
TSMC alone plans to spend $100 billion over the next three years to expand its chip fabrication capacity in Taiwan. If implemented effectively, the various CHIPS+ programs will ensure that the United States stays ahead of the Moore’s Law curve—along with the related downstream economic and strategic benefits.
However, such an outcome is still contingent upon sustained federal support for U.S. technological leadership. While the passage CHIPS+ was a significant start, it represents only the beginning of what should be a long-term U.S. strategy for facilitating a more competitive innovation system and a vibrant domestic semiconductor industry.
Gregory Arcuri is a research assistant with the Renewing American Innovation Project at the Center for Strategic and International Studies (CSIS) in Washington, D.C. Sujai Shivakumar is the director and senior fellow of the CSIS Renewing American Innovation Project. Critical Questions is produced by the Center for Strategic and International Studies (CSIS), a private, tax-exempt institution focusing on international public policy issues.
Its research is nonpartisan and nonproprietary. CSIS does not take specific policy positions. Accordingly, all views, positions, and conclusions expressed in this publication should be understood to be solely those of the author(s). © 2022 by the Center for Strategic and International Studies.
How long will Moore’s law hold?
Tech industry experts reflect on the theory and its future implications as the April 19th anniversary approaches. The 55th anniversary of Moore’s Law is a time for reflection and to ask how relevant the theory remains. The answer is it depends on who you talk to.
But first, a little background. In 1965, Intel’s co-founder, Gordon Moore, predicted that chip improvements would double processor speeds and that overall processing performance would double every two years. That theory stuck and Moore’s Law became something of a guideline for computer processor manufacturing.
Thanks to Moore’s Law, there have been steady improvements made to iPhones, Samsung Galaxy smartphones, and various other devices. SEE: 10 tips for planning a data center hardware refresh (TechRepublic) Now, some industry experts believe Moore’s Law is no longer applicable.
- It’s over.
- This year that became really clear,” said Charles Leiserson, a computer scientist at MIT and a pioneer of parallel computing, told MIT Technology Review in February.
- Moore’s Law, Leiserson said, was always about the rate of progress, and “we’re no longer on that rate.” In 2019, Nvidia CEO Jensen Huang declared that Moore’s Law is dead and now it’s more expensive and more technically difficult to double the number of transistors driving the processing power.
That sentiment was also proclaimed a year earlier by Mike Muller, chief technology officer at chip designer Arm, Others say not so fast. It may be slowing down, but “the trend is still there,” said Karen Panetta, an IEEE fellow and dean of graduate engineering at Tufts University.
- Many people are holding to the true definition that it has to be transistors on silicon and they have to double every two years, and in that case, that is not happening, she acknowledged.
- The name of the game now is the technology may not be traditional silicon transistors; now it may be quantum computing, which is a different structure and nano-biotechnology, which consists of proteins and enzymes that are organic,” Panetta said.
That means the essence of Moore’s Law will likely change given that with quantum computing, “you may end up with exponentially more than” processing power doubling every two years, as well as the use of different materials, she said. “It may not be transistors and a constant number of twoevery couple of years; it may be raised to the power of more, depending on what the technology is.” Mario Morales, a program vice president at IDC, said he also believes the law is still relevant, in theory.
- If you look at what Moore’s Law has enabled, we’re seeing an explosion of more computing across the entire landscape,'” Morales said.
- It used to be computing was centered around mainframes and then it became clients and now edge and endpoints, but they’re getting more intelligent, and now they’re doing AI inferencing, and you need computing to do that.
So Moore’s Law has been able to continue to really push computing to the outer edge.” Echoing Panetta, Morales said there’s been a shift in how we think about Moore’s Law. “We’re going beyond it now when we think about incremental improvements of software,” he said.
Because so much of computing now includes AI and machine learning, changes are happening much faster than the previous 18- to 24-month period, Morales said. Moore’s Law will probably be replaced within the next five years—or maybe upgraded based on what comes out of nanobiology or quantum computing, Panetta said.
Morales doesn’t think it will be replaced, but rather, augmented. “Moore’s Law has been in place for 55 years and it’s still going,” he said. “It gets more and more challenging to push the envelope in processing technology—it’s still happening, but it’s getting more expensive.” Over time, Moore’s Law will be augmented by the amount of innovation in design and AI support, he said. Getty Images/iStockphoto
What will happen to Moore’s law in the future ~?
Executive Summary –
Intel has a rich history of foundational process innovations in pursuit of Moore’s Law. Advanced packaging gives architects and designers new tools in their pursuit of Moore’s Law. Intel has a full pipeline of research that gives us the confidence of maintaining Moore’s Law. All considered, numerous options are available to designers and architects in their continued mission to deliver Moore’s Law
By Dr. Ann Kelleher Executive Vice President and General Manager of Technology Development Figure 1: Original graph from “Cramming more components onto integrated circuits” 1 In 1965, Intel co-founder Gordon Moore predicted that the number of transistors on a chip would double roughly every two years, with a minimal rise in cost 1,
This prediction became known as Moore’s Law and is depicted in Figure 1. The more transistors or components on a device, the cost per device is reduced while the performance per device is increased. The rate of digitalization of the world surged over the past two years, triggered by the COVID-19 pandemic, and this enhanced transition was enabled by the semiconductor industry and its innovation.
Intel CEO Pat Gelsinger has shared: “Technology has never been more important for humanity than it is now. Everything is becoming digital, with four key superpowers.” The superpowers – ubiquitous computing, cloud-to-edge infrastructure, pervasive connectivity and artificial intelligence – are set to transcend and transform the world.
- At this time we see no end to the demand for compute, and more compute continues to push the industry for more innovation.
- For example, the world creates nearly 270,000 petabytes (i.e.27 x10 19 ) of data every day 2,
- We are projecting that by the end of this decade, on average, all of us will have 1 petaflop (10 15 floating-point operations per second) of compute and 1 petabyte of data less than 1 millisecond away 3,
This demand for more and more computing power is the push for the industry to maintain the pace of Moore’s Law. For over 40 years, Intel engineers have continually innovated to squeeze more and more transistors onto ever-smaller chips and maintain the pace of Moore’s Law.
- In the mid to late 2010s, as it has several times before, the industry predicted that “Moore’s Law is dead.” To paraphrase a famous saying, I feel the reports of the death of Moore’s Law are greatly exaggerated.
- Innovation is not dead, and we will maintain Moore’s Law as we always have, through innovation – innovation in process, in packaging and in architecture.
It will be a challenge as always – and Intel is up to the challenge. Figure 2: Transistor innovations over time Innovation Today: Process Intel has a long, rich history of foundational process innovations in pursuit of Moore’s Law, as seen in Figure 2.
Intel engineers and scientists have continually faced — then overcome — the challenges posed by physics when the features on a chip shrink to the size of atoms. With inventions such as high-k metal gate technology, tri-gate 3D transistors and strained silicon, Intel has consistently delivered groundbreaking technologies to maintain pace with Moore’s Law.
By the late 2000s, as physical dimensions continued to shrink, the industry realized that additional areas of innovation, including materials science, new process architecture and design technology co-optimization (DTCO), were needed to keep pace. Intel’s next great architectural innovation is RibbonFET, our implementation of the gate-all-around (GAA) transistor, arriving with Intel 20A.
RibbonFET represents our first new transistor architecture since FinFET. RibbonFET delivers faster transistor switching speeds with the same drive current in a smaller footprint. At the same time, we also deliver PowerVia, the industry’s first backside power delivery architecture. Previously, power came from the top of the die and “competed” with signal interconnects.
By separating power and signal, you can use the metal layers more effectively, as there are fewer trade-offs to make. This results in improved performance. The next generation of extreme ultraviolet (EUV) lithography, High Numerical Aperture or “High NA,” brings further improvements in resolution and error reduction, delivering a reduction in process complexity with an increased flexibility in design rules.
Intel is in close partnership with ASML and other ecosystem partners to be the first to bring this technology into high-volume production. These examples are just the beginning. After the introduction of RibbonFET and PowerVia with Intel 20A and Intel 18A, new follow-on process nodes are already in development delivering additional gains in power, performance and density.
These gains are achieved through several innovations, including backend metal resistance and capacitance improvements, transistor architecture and library architecture improvements. As we said in July 2021, as we implement these innovations and others, we expect to achieve transistor performance per watt parity by 2024 and leadership by 2025.
- Figure 3: Package innovations over time Innovation Today: Packaging The role of packaging and its contribution to Moore’s Law scaling is evolving.
- Until the 2010s, the primary role of packaging was to route power and signaling between the motherboard and silicon, and to protect the silicon.
- Each evolution in that era – from wire bond and lead frame packages, to flip chip technology on ceramic substrates, to the adoption of organic substrates and introduction of multi-chip packages – brought an increased number of connections.
These connections supported more functionality in the silicon, which was needed for Moore’s Law scaling. Packaging served as the vehicle through which the benefits of Moore’s Law were realized. (See Figure 3.) Moving forward, as we enter the advanced packaging era, we see gains in transistor density being delivered by our packaging.
Even Gordon himself understood the importance of packaging and said as much in his original paper: “It may prove to be more economical to build large systems out of smaller functions, which are separately packaged and interconnected.” 4 As we enter the advanced packaging era, these 2D and 3D stacking technologies give architects and designers the tools to further increase the number of transistors per device and will contribute to the scaling needed for Moore’s Law.
For example, our embedded multi-die interconnect bridge (EMIB) technology allows a designer to, paraphrasing Gordon again, “cram more transistors” in the package. This allows the designer to far exceed the size limitations of a single piece of silicon.
- EMIB also enables the use of silicon from different process nodes in a package, allowing a designer to choose the best process node for that specific IP.
- Intel’s Foveros technology established the industry’s first active logic-on-logic silicon stacking capability, creating the ability to add logic transistors in a third dimension.
Both achievements represent a notable change in how we deliver an increasing number of transistors per package. When combined, these technologies can achieve a level of integration never seen. For example, Ponte Vecchio, where we combine 47 tiles of silicon in a single package, sets a new benchmark for advanced packaging functionality.
Our upcoming evolutions of Foveros – Foveros Omni and Foveros Direct – deliver new scaling, new interconnect technology and new mix-and-match capabilities. Foveros Omni further scales the interconnect pitch to 25 microns and adds options for multiple base die. This is an approximate 4x increase in density over EMIB while also expanding our ability to mix and match base tiles.
Foveros Direct introduces solderless direct copper-to-copper bonding, enabling low resistance interconnects and sub-10-micron bump pitches. The resulting interconnect capability opens new horizons in functional die partitioning that were not previously achievable and the ability to vertically stack multiple active layers of silicon.
- As these technologies (and others) come to market, advanced packaging will deliver another tool to designers and architects to use in their pursuit of Moore’s Law.
- Figure 4: Major areas of research Innovation Tomorrow: Components Research As I mentioned earlier, I believe innovation, along with demand from end users, drives Moore’s Law.
Intel’s Components Research is focused on three key research areas (see Figure 4) to deliver the fundamental building blocks for more powerful computing well into the future. We have a full pipeline of research underway that gives us the confidence we will maintain Moore’s Law for the next decade or longer.
- Future innovations fueling Moore’s Law are limited only by our imagination.
- Recently, at the 2021 IEEE International Electron Devices Meeting (IEDM) 5, we outlined several areas of future innovation.
- One focus for our research is scaling technologies that deliver more transistors in the same area.
- This includes innovative lithography advancements like directed self-assembly (DSA) of molecules to improve line edge roughness and edge placement accuracy 6,
We also research novel materials, just a few atoms thick, to create thinner transistors, shrinking their overall size. In addition to innovations like these, we are establishing viable capabilities to stack transistors vertically either monolithically on the same piece of silicon or as chiplets using advanced packaging technologies like hybrid bonding with ever-decreasing vertical interface pitches.
- Having new materials, transistor architecture innovations, lithography breakthroughs and packaging inventions as degrees of freedom, designers will only be limited by their imaginations.
- As we enable more powerful computing through scaling, we need to bring new capabilities to silicon and stretch its limits.
By integrating new materials, we can deliver power more efficiently and meet greater demands for memory. We are also researching ferroelectric and antiferroelectric materials, which can retain their charge state based on a different type of physics without having to rely on low leakage transistors.
We have invented a novel memory architecture based on the unique physics of ferroelectric materials that enables a significant boost in bit density by using one access transistor with multiple capacitors in parallel. Ferroelectric memory is a strong candidate for an embedded dense memory tier between cache and main memory.
We are also embracing the quantum realm, not just in the form of quantum computing, but by exploring new concepts in physics and materials science that may one day revolutionize the way the world does computing. The long-term progression of Moore’s Law requires overcoming the exponential growth in the power consumption requirements of current CMOS-based computing 7,
- To continue, to scale ultra-low power solutions that use quantum effects in materials (called quantum materials) at ambient room temperatures will be required.
- In 2021 at IEDM, we reported a huge milestone in beyond-CMOS device research: the first functional demonstration of a magneto-electric spin orbit logic device with its read and write components functional at room temperature.
Both the spin orbit output module and a magnetoelectric input module are integrated together into the device, and magnetization state reversals are achieved via applied input voltage. With its ability to realize the higher functionality majority gate (versus NAND and NOR ones) three MESO devices forming ultra-low power majority gates can implement a 1-bit adder, which would otherwise require 28 CMOS transistors 8,
- Figure 5: Moore Law number of transistor per device: past, present, future In Conclusion Moore’s Law predicts that the number of transistors per device will double every two years.
- Moore’s Law is and always has been driven by innovation.
- Figure 5 illustrates the number of transistors per device as we look to the past, the present and the future.
For the first 40 years, the gains came primarily from innovations in our process. Going forward, gains will come from innovations in both process and packaging. Our processes will continue to deliver historic density improvements, while our 2D and 3D stacking technologies give architects and designers more tools to increase the number of transistors per device.
As we look forward to innovative technologies such as High NA, RibbonFET, PowerVia, Foveros Omni and Direct, and others, we see no end to innovation and therefore no end to Moore’s Law. In summary, when we consider all the various process and advanced packaging innovations, there are numerous options available to continue to double the number of transistors per device at the cadence demanded by our customers.
Moore’s Law only stops when innovation stops, and innovation continues unabated at Intel in process, packaging and architecture. We remain undeterred in our aspiration to deliver approximately 1 trillion transistors in a single device by 2030. Dr. Ann B.
Is M1 or i9 better?
Battery Life – Before we wrap up this comparison, we think it’s worth talking about the battery life since we’re looking at laptop chips, after all. As we mentioned in our M1 Max-powered Apple MacBook Pro review, we were able to end a full eight-hour workday with more than 60% battery left.
Of course, this is without any photo or video editing workloads, but that’s still an impressive number. In fact, even editing and rendering a 12 minute 4K video only drained 22% of battery. These are some numbers that you are less likely to see on a high-performance machine that’s powered by an Intel Core i9-12900HK.
Apple’s M1 Pro and M1 Max chips are way more power-efficient than anything Intel has to offer in its H-series. Apple doesn’t advertise any TDP for the chips of the devices but it absolutely crushes Intel chips – or any other chips for that matter – when it comes to performance-per-watt. Image: Apple One of the real-world benefits of this is being able to perform even the most resource-intensive tasks such as a photo or video editing on a MacBook Pro without having to connect the charger. A high-performance Intel-powered notebook will start throttling due to the lack of enough power to draw.
- Not to mention, the M1 Pro and M1 Max also have powerful integrated graphics that consume significantly less power than a discrete graphics unit on a high-performance Intel-powered notebook would consume.
- As we mentioned earlier, you’ll need at least an RTX 3070 Ti laptop GPU to match the general graphics performance of the new M1 chips, and those graphics units consume a lot more power.
Apple’s unified memory also consumes less power overall, which again helps with power efficiency.
Is there a better processor than M1?
A leaked roadmap by Intel suggests that the company is developing a new lineup of CPUs that are targeted at outperforming Apple’s 14-inch MacBook Pro with the M1 Pro and M1 Max chips by late 2023, or early 2024, which would be almost two years after the new chips and laptop made their debut. The roadmap by Intel, initially leaked by AdoredTV and interpreted by Wccftech, explicitly states that Intel wants to compete with Apple’s 14-inch MacBook Pro with its Arrow Lake series. According to the roadmap, Intel’s 15th generation Arrow Lake processors could be ready to ship by late 2023, or early 2024 with a priority on delivering high-performance while using minimal energy. Leaked Intel roadmap shared online by AdoredTV With Arrow Lake, it looks like Intel is prioritizing mobile over desktop first and while there will be both Arrow Lake-S and Arrow Lake-P CPUs, the company is aiming to specifically produce its 15th Gen mobility CPUs first to tackle Apple’s next-generation MacBook 14″ laptops.
Based on the leaked roadmap, it looks like we will see the first engineering samples ready by late 2022 and early 2023 with QS chips shipping out in Q3 2023 and final production beginning the same quarter. And lastly, the CPUs will be ready for RTS (Ready To Ship) in Q4 2023. So this means we are looking at a late 2023 or early 2024 launch for the next-generation Arrow Lake mobility CPU lineup.
The roadmap also says that Intel will utilize TSMC’s 3nm process. Apple currently utilizes the 5nm process for its latest chips and is expected to adopt the 3nm chip architecture in 2023 with the ” M3 ” Apple silicon chip and A17 chip in the iPhone 15,
Intel has already beaten Apple’s M1 Max chip on paper if you ignore high-energy consumption and poor battery life. Benchmarks show that Intel’s latest Core i9 processors received a higher score than Apple’s M1 Max chip in tests, but that 4% increase in performance is offset by a marked reduction in battery life compared to Apple’s chips.
Tests show that a laptop with Intel’s latest i9 Core chip only lasts six hours for video playback. In comparison, Apple advertises the latest 16-inch MacBook Pro as getting up to 21 hours of battery life for offline video playback. Ever since Apple announced its transition away from Intel during the summer of 2020, it has been slowly transitioning its Macs to custom-made chips.